(1) Field of the Invention
The present invention relates to an image processing apparatus for use in three-dimensional graphics, the image processing apparatus having a frame buffer for storing image information and depth information per pixel, and more particularly to an image processing apparatus having a frame buffer for storing depth information to compare the depths of a plurality of figures for pattern filling or Z merging.
(2) Description of the Related Art
When a plurality of three-dimensional figures are simultaneously displayed on an image display device, a front figure and a back figure are superposed if all the image information of the figures is displayed. It is therefore necessary to employ a means for determining to which figure image information to be outputted to the image display device belongs pixel by pixel.
Three-dimensional image display systems display information which is composed of image information (I value) and depth information (Z direction information: Z value) that are assigned to each pixel. When the information is to be displayed, the Z values of the pixels are compared, and the image information of the pixels are compared, and the image information of those pixels which are in the topmost position or front layer is written in an image buffer of a frame buffer.
FIG. I(A) of the accompanying drawings is a conceptual representation of a conventional three-dimensional image display system. The three-dimensional image display system shown in FIG. I(A) comprises a Z buffer 1, an image buffer 4, a CRT (Cathode-Ray Tube) 5, a processor 6, and a main memory 7. The Z buffer 1 and the image buffer 4 are jointly referred to as a frame buffer. The Z buffer 1 includes a Z buffer control circuit 2 and a Z buffer memory 3.
The processor 6 generates and stores plotting data in the main memory 7. The plotting data are composed as a cluster of line segments (straight lines) of three-dimensional data, and converted into two-dimensional projected data, which are written in the image buffer 4 and displayed on the CRT 5.
In plotting data in three-dimensional graphics, a Z buffer data concealing process is generally used in order to produce a two-dimensional projected image.
More specifically, the image buffer 4 stores I values, i.e., the image information of a figure, of respective pixels, and the Z buffer I stores Z values, i.e., the depth information of the figure, corresponding to the respective I values stored in the image buffer 4. The Z buffer control circuit 2 for controlling the Z buffer 1 compares the depth information (Z value) of a certain pixel with the Z value of a pixel that has originally been plotted in the position (as expressed by X and Y coordinates) of that pixel, and leaves the I and Z values of the pixel which is less deep, i.e., whose Z value is smaller, in the image buffer 4 and the Z buffer, respectively. Therefore, when a three-dimensional object is plotted as a two-dimensional image, it is possible to display a naturally represented image whose deeper portions concealed by surfaces and ridges that are in the front position.
FIG. 2(A) of the accompanying drawings illustrates a process of calculating the Z value of each pixel for plotting a desired straight line in the three-dimensional image display system. In the process shown in FIG. 2(A), X and Y coordinates and corresponding Z values of pixels which make up a straight line extending from a starting point having coordinates (Xs, Ys) to an ending point having coordinates (Xe, Ye).
The Z buffer control circuit 2 is given an initial value Zs of the Z value at the starting-point coordinates (Xs, Ys) and an increment Zi of the Z value between two adjacent pixels. Based on the given values, the Z buffer control circuit 2 calculates the Z values of the respective pixels making up the straight line, from starting-point coordinates (Xs, Ys) to the ending-point coordinates (Xe, Ye).
In addition, the Z buffer control circuit 2 compares each of the calculated Z values with the Z value of a pixel of an image that has originally been present at the corresponding X and Y coordinates. If the calculated Z value is smaller than the Z value of the pixel that has originally been present, then the Z buffer control circuit 2 writes the calculated Z value into the Z buffer memory 3, and allows the I value of the corresponding pixel to be written into the image buffer 4, i.e., writes a newly plotted pixel into the image buffer 4. If the calculated Z value is greater than the Z value of the pixel that has originally been present, then the Z buffer control circuit 2 does not update the Z buffer memory 3 and the image buffer 4, and hence keeps the information relative to the originally present pixels in the buffer memory 3 and the image buffer 4.
FIG. 1(B) of the accompanying drawings shows the Z buffer control circuit 2 in detail. The Z buffer control circuit 2 includes a Zs register 25, a Zi register 26, a Y address register 28, and an X address register 29. These registers store the initial value Zs, the increment Zi, the starting-point coordinates (Xs, Ys), and the ending-point coordinates (Xe, Ye) which are given from the processor 6. The Z buffer control circuit 2 also has an adder 22 for successively calculating the Z values of the respective pixels from starting-point coordinates (Xs, Ys) to the ending-point coordinates (Xe, Ye) based on the initial value Zs and the increment Zi, and successively outputting the calculated Z values to an output register 23. The output register 23 successively transmits the calculated Z values Zw to the Z buffer memory 3 through a signal line 20, and also to a comparator 24.
The comparator 24 successively compares the calculated Z values Zw from the output register 23 with Z values Zr of originally present pixels read from the Z buffer memory 3. If a calculated Z value Zw is smaller than a Z value Zr, then the comparator 24 supplies a write permit signal to the Z buffer memory 3 and the image buffer 4 through a signal line
The Z buffer memory 3 and the image buffer 4 write therein a calculated Z value Zw and a corresponding I value at the time a write permit signal is supplied thereto. The addresses where these values are written in the Z buffer memory 3 and the image buffer 4 are determined on the basis of the starting-point coordinates (Xs, Ys) to the ending-point coordinates (Xe, Ye) that are stored in the X and Y address registers 29, 28.
Heretofore, the Z buffer data concealing process is carried out with respect to each of the pixels that make up the straight line.
The coordinates of the pixels making up the straight line are calculated by DDA (Digital Differential Analyzer) or the like, which will however not be described below as it has no direct bearing on the present invention. The calculation of the I values of the pixels to be written in the image buffer 4 will no be described below either.
Pattern filling is frequently used in plotting an object as a solid model in three-dimensional graphics. In pattern filling, a surface is processed as a cluster of many horizontal lines as shown in FIG. 2(B) of the accompanying drawings. Since the above calculation of a Z value per pixel greatly affects the processing time, it has been an obstacle to demands for high-speed image plotting.
The image buffer 4 of the frame buffer generally comprises a dual-port D-RAM (Dynamic Random-Access Memory) called a video RAM. The video RAM has a plotting RAM port and a display SAM (Serial-Access Memory) port, and writes and holds the I value of one frame through the RAM port, and successively outputs the I values of one scanning line through the SAM port.
The Z buffer 1 of the frame buffer is not required to have an SAM port as the Z values are used in plotting an image but not in displaying an image. Therefore, the conventional Z buffer may comprise a dual-port D-RAM with its SAM port made unusable or an inexpensive single-port D-RAM.
FIG. 3 of the accompanying drawings shows a conventional frame buffer having an image buffer and a Z buffer which comprise D-RAMs, respectively. In FIG. 3, each of an image buffer 52 and a Z buffer 54 has a RAM port for communication with a plotting/controlling unit 50. The image buffer 52 has a SAM port for outputting display data to an image display device (not shown). The Z buffer 54 has no such SAM port.
According to another conventional design, a frame buffer is not composed of two D-RAMs, but comprises a single video RAM for storing both Z and I values. The video RAM has an area for storing the Z values and an area for storing the I values, the areas being separately controlled. When an image is to be displayed, the video RAM outputs only the I values from a SAM port.
FIG. 4 of the accompanying drawings shows a conventional frame buffer which comprises a single video RAM chip. In FIG. 4, both Z and I values are written in a frame buffer 62 that comprises a single video RAM chip. The frame buffer 62 has a RAM port connected to a plotting/controlling unit 60 for inputting and outputting both the Z and I values, and a SAM port for outputting only the I values, but not the Z values.
Addresses of separate areas for storing Z and I values are illustrated in FIGS. 5(A) and 5(B) of the accompanying drawings. As shown in FIG. 5(A), all bits of a row address are used to indicate an address in a Y direction. As shown in FIG. 5(B), the most significant bit of a column address is used as a bit to differentiate the area for storing the Z values from the area for storing the I values, and the low-order 8 bits of the column address are used to indicate an address in an X direction.
There has recently been proposed a three-dimensional image display system with a Z merging function for displaying a figure with a small depth, i.e., with small Z values, based on a plurality of three-dimensional graphic data after they have been plotted. According to the proposed three-dimensional image display system, the display data of three-dimensional figures that are plotted separately in a plurality of frame buffers are concealed in a Z merging unit, and thereafter a composite image thereof is displayed on an image display device. In order to realize this system, it is necessary to output both the Z and I values from each of the frame buffers.
FIG. 6 of the accompanying drawings shows a display mechanism of a three-dimensional image display system with no Z merging function. With no Z merging function, figures from a plurality of frame buffers cannot be concealed, and an image is displayed on a display unit 82 based on I values outputted from a single frame buffer 80.
FIG. 7 of the accompanying drawings shows a display mechanism of a three-dimensional image display system with a Z merging function. In FIG. 7, a Z merging unit 94 effects a concealing action on Z and I values outputted from a frame buffer A 90 and Z and I values outputted from a frame buffer B 92, and outputs generated I values to a display unit 96.
The Z merging function allows a figure to be plotted by the plural frame buffers, resulting in high-speed graphic display operation. However, the frame buffers each capable of outputting both Z and values are required to perform the Z merging function.